This invention relates to integrated circuits such as programmable logic device integrated circuits, and more particularly, to reducing simultaneous switching noise in power supply signals on such integrated circuits.
Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design tools to design a custom logic circuit. When the design process is complete, the tools generate configuration data files. The configuration data is loaded into memory elements on the programmable logic devices to configure the devices to perform the desired custom logic function.
The performance of modern integrated circuits such as programmable logic devices can be adversely affected by power supply noise. Power supply noise may be generated when multiple circuits are switched simultaneously. This type of power supply noise is sometimes referred to as power supply simultaneous switching noise. Power supply simultaneous switching noise arises when multiple circuits draw current in unison, creating current spikes on the power supply lines. If power supply simultaneous switching noise becomes too large, circuit functions on a programmable logic device may be disrupted.
It would therefore be desirable to be able to provide ways in which to minimize power supply simultaneous switching noise on integrated circuits such as programmable logic device integrated circuits.